sci-electronics/yosys
framework for Verilog RTL synthesis
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yosys-9999
yosys-0.47
yosys-0.40-r1
yosys-0.40
yosys-0.32
yosys-0.19
yosys-0.9.3981
!readline?
( libedit?
( dev-libs/libedit:= )
)
readline?
( sys-libs/readline:= sys-libs/ncurses:= )
dev-lang/tcl:=
python?
( python_single_target_python3_8?
( dev-libs/boost[python_targets_python3_8
(-)
] )
python_single_target_python3_9?
( dev-libs/boost[python_targets_python3_9
(-)
] )
python_single_target_python3_10?
( dev-libs/boost[python_targets_python3_10
(-)
] )
python_single_target_python3_11?
( dev-libs/boost[python_targets_python3_11
(-)
] )
)
libffi?
( dev-libs/libffi )
sys-libs/zlib
python?
( python_single_target_python3_8?
( >=dev-lang/python-3.8.13:3.8 )
python_single_target_python3_9?
( >=dev-lang/python-3.9.12:3.9 )
python_single_target_python3_10?
( >=dev-lang/python-3.10.4:3.10 )
python_single_target_python3_11?
( >=dev-lang/python-3.11.0_beta3:3.11 )
)
media-gfx/xdot