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sci-electronics/circt

The fast free Verilog/SystemVerilog simulator

Screenshots

  • circt-1.76.0
    ~amd64 ~arm64 ~riscv ~x86
    test python_targets_python3_11 python_targets_python3_12

    View      Download      Browse     License: Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc   
    Overlay: guru
  • circt-1.37.0
    ~amd64 ~arm64 ~riscv ~x86
    test python_targets_python3_10 python_targets_python3_11 python_targets_python3_12

    View      Download      Browse     License: Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc   
    Overlay: vowstar
  • circt-1.37.0
    ~amd64 ~arm64 ~riscv ~x86
    test python_targets_python3_11 python_targets_python3_12

    View      Download      Browse     License: Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc   
    Overlay: guru
  • circt-1.14.0
    ~amd64 ~arm64 ~riscv ~x86
    test python_targets_python3_11 python_targets_python3_12

    View      Download      Browse     License: Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc   
    Overlay: guru
  • circt-1.14.0
    ~amd64 ~arm64 ~riscv ~x86
    test python_targets_python3_10 python_targets_python3_11 python_targets_python3_12

    View      Download      Browse     License: Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc   
    Overlay: vowstar

Reverse Dependencies

sci-electronics/chisel-meta
Reverse dependancies are sometimes conditional based on your USE flags, Ebuild version and sometimes other packages. please keep this in mind.