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sci-electronics
/yosys
framework for Verilog RTL synthesis
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http://www.clifford.at/yosys/
yosys-9999
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License: ISC
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salfter
yosys-0.47
amd64
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License: ISC
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salfter
yosys-0.40-r1
~amd64
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License: ISC
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guru
yosys-0.40
~amd64
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License: ISC
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vowstar
yosys-0.32
~amd64
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License: ISC
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vowstar
yosys-0.19
~amd64
tcl libffi readline libedit zlib test
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License: ISC
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qsx
yosys-0.9.3981
~amd64 ~x86
+abc clang libffi libedit readline python python_single_target_python3_8 python_single_target_python3_9 python_single_target_python3_10 python_single_target_python3_11
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License: ISC
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xdch47
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